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First batch of ASPEED Arm devicetree changes for 6.19
Significant changes: - The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems New platforms: - IBM Balcones The Balcones system is similar to Bonnell but with a POWER11 processor. Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI tree is needed. - Meta Yosemite5 The Yosemite5 platform provides monitoring of voltages, power, temperatures, and other critical parameters across the motherboard, CXL board, E1.S expansion board, and NIC components. Updated platforms: - clemente (Meta): LEDs, shunt resistor configuration - santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs There are a scattering of one-off changes and devicetree cleanups for other platforms as well. -----BEGIN PGP SIGNATURE----- iJIEABYKADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaQPvIxwcYW5kcmV3QGNv ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmWf4A/0xN2+KOIfqkVSut5IP2 Y54gRoSR9xhEeoaOq1xHrvJpAQCqo6V5j1dmx21qTDhFbxGxU4KH6SUBhVpIMNYj vGZhCA== =e3/X -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghTsACgkQmmx57+YA GNka7Q/7BVAkUmHTXMfxP+VWDYzqhV5G4LjrdaW01heQC3j1mTv4qL5KGQTrrEQU gC2tZ/rpIpOvc1PdTubh/B1sMdRPb/c0+NVpYTbfjrEMSFSLWLxyNOVhFD3fBxMz 8jj1YS4o8Z0KmgHQNuhy6+nPUiez8aPyYBWk6r6ZsgB4kmGyThRAhUB75wwgd8gl DDINQe/mPlOKY3YwIniS7pT53z7fyKfXXOVvTWGYQOB79ykUpNdppK1POVsywueT +2g0juDD/SELCf4TP7eq/JKts4SDMlePlt5pKqIchRdzAucaNnl1220T31Y2aHEd rj1Nyf8Ad0uGsLwizGnvoremtfhCo0yOlVPotB1nbR/spadNU8IcX61RNd6eS98B VWrZBTsUSKcrxgE/+gDDGipSOpR5b0dmH+ignJuhWH8uiDwfT1urYUIB8Nnuueeh udkPraSM+yQr0HfajQrJPeIIQaxP/7VnQr5yNfFIQk3aD5TR92cFFviI8lsJybVt uhKb9vd4mdeE0V1EIrWjSWX757Zcvbo8xWULYdLdex21JJ2adYXu7DHO8vntGckC /EzF+z1wCjHKNOYnNAV7rqD6LT8IKb4lbxS6GWSupI4aicoLZsrQhp0FlS7H+KLg NYz6ClQJstwC58B+lEU6wEE3SU+P3Bp9UU7N9Zzhih9zayrRiN0= =8yf0 -----END PGP SIGNATURE----- Merge tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt First batch of ASPEED Arm devicetree changes for 6.19 Significant changes: - The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems New platforms: - IBM Balcones The Balcones system is similar to Bonnell but with a POWER11 processor. Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI tree is needed. - Meta Yosemite5 The Yosemite5 platform provides monitoring of voltages, power, temperatures, and other critical parameters across the motherboard, CXL board, E1.S expansion board, and NIC components. Updated platforms: - clemente (Meta): LEDs, shunt resistor configuration - santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs There are a scattering of one-off changes and devicetree cleanups for other platforms as well. * tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module ARM: dts: aspeed: santabarbara: Add AMD APML interface support ARM: dts: aspeed: santabarbara: Add gpio line name ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC ARM: dts: aspeed: santabarbara: Add sensor support for extension boards ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC dt-bindings: arm: aspeed: add Meta Yosemite5 board ARM: dts: aspeed: clemente: Add HDD LED GPIO ARM: dts: aspeed: Fix max31785 fan properties ARM: dts: aspeed: Add Balcones system dt-bindings: arm: aspeed: add IBM Bonnell board dt-bindings: arm: aspeed: add IBM Balcones board ARM: dts: aspeed: harma: Add MCTP I2C controller node ARM: dts: aspeed: yosemite4: allocate ramoops for kernel panic ARM: dts: aspeed: clemente: add shunt-resistor-micro-ohms for LM5066i Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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