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Qualcomm clock fixes for v7.2
Fix the Eliza display clock controller to avoid RCG stall. Revert the rework of the "PHY mux" clock, as this broke PCIe on several different targets. Drop (and correct one) bouncing maintainer email addresses in DeviceTree bindings. -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmpnlToOHGJqb3JuQGty eW8uc2UACgkQCx85Pw2ZrcWNXg//RN1nAKFwKalihovDtpk6wlkxdUEJl53E1dcU t5BWTTPWqlSmlc/FWvIqe7EccWRkm/3/rzt1KKaTw6mqupm2pmvtHa/A1dIfzNuw EMwcFZQssb4m56rS+hO8fvGTxSE8MEd+gl4UXet+neXGvmM7mLu+LotMIH0EbELT QZetojCYtZQVezkiNy/BKiXLCER/FnuQU0S37cpOR6bEWiS0rzptPKAFX3qgoKZ/ I1ff7iCJ5DJSkIYgAZhFXvMk4V6GGP+HXBp5LnWyzxTt+J5+YER+L5Zmv0po8NFh NzFxfC9nH+kihD9716FouII64QbwbmKdTc0qS1tLhH9u5OQmhTZEQ283kadpZIdc nwIglsdmibgFixRDM6sI7CR3aYuFZVbaMCMKWRC9aE7Vxpf0KuRzJnmqxCOwqa1u 5E6+Ps5wb93+mDtYAdx+qRXzLh8ZGUZksoVOE2gC6aZGFkDHEAkQewww6nEQ5ikT 9dZlgnesgMux78Yn1H+PhTFtNXgJXFjWGgBm2YgVXOCvDyXaTF6LE3wlpSIeo9SV mGAExhPm0OrBmxyN15ynQhVXrn4cKv5sY3rBRKPWtVi3pzWmp1y7KVBf/AL6UONj c6VmCq1hFBPrV6IUPM8kHJK50Ju+yIrcqS2P6quEaEIT8RKCyunvurwHHjhUz7Ya uUM7ZxI= =yj29 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmp6GioUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSW9bA//SYbI1Mj6q2gMJyFZEL0Fz8P5pfWI LAPPAFK+xhTQDl0POkv2/zzRYmXhuQFTD/v2asRmCyu/C9b+GMKVBTuAQWnybSy3 Mp6HjYRrAVpMbZE56lLGkgZXi6a3bZOh9K5m6wdd5frMQt131slBaiiK/U3ZyFKR TQEIpNsbNa5mx614yCqobEDlGBIO0o4r2Z4iQD05ni2MH+ZYhVUKo+8gisEJledR GK7ter1b04MCMaxLuW6GAj46DNUhXdXTaEunmgdimjhtSTCy09AulTZO477heQQj PGXXxjuh7bxY0z8xorbWeqgz1nhr1L/nSDXPxTOyydBJ4FESqEtx8H4SaYiqdqxI AGNMH7KQPPJTf9nB8lJWFW8tlUi71a/LlQHH8Gu55+N28nkTceQ02dR1eUSue43I o2g6PMDUayX5SQRyQyEmO4Geusm5yENNHSxL7myDOsw3XIJbt9fjCTdulA50azK2 3QsFkXHy+fBOHxLa2njELKpga/AkUmmmfdj8u3nSe7z60Rjo0ZqUgPd61zO6HTf+ ncDjKlWHnihb7TnEQWyYSLZr9t/BOALDQXS8UFoxaNYu1ReNrV9OqxZFKN/igX77 HzYEmYURM5XeS3I/W8ignbxAXk6VBGvd91tv3By8o7fhlPfPQNCCcOJ9VvhdBkFb Vrf6zvBdavldz3U= =RZDP -----END PGP SIGNATURE----- Merge tag 'qcom-clk-fixes-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-fixes Pull Qualcomm clock driver fixes from Bjorn Andersson: - Fix the Eliza display clock controller to avoid RCG stall. Revert the rework of the "PHY mux" clock, as this broke PCIe on several different targets - Drop (and correct one) bouncing maintainer email addresses in Qualcomm clk DeviceTree bindings * tag 'qcom-clk-fixes-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: clock: Replace bouncing emails Revert "clk: qcom: regmap-phy-mux: Rework the implementation" clk: qcom: dispcc-eliza: Fix disp_cc_mdss_mdp_clk_src RCG stall on Eliza EVK
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