ASoC: meson: axg-fifo: fix fifo threshold setup

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commit 864cee90d4 upstream.

On TODDR sm1, the fifo threshold register field is slightly different
compared to the other SoCs. This leads to the fifo A being flushed to
memory every 8kB. If the period is smaller than that, several periods
are pushed to memory and notified at once. This is not ideal.

Fix the register field update. With this, the fifos are flushed every
128B. We could still do better, like adapt the threshold depending on
the period size, but at least it consistent across the different
SoC/fifos

Fixes: 5ac825c3d8 ("ASoC: meson: axg-toddr: add sm1 support")
Reported-by: Alden DSouza <aldend@google.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20191218172420.1199117-2-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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This commit is contained in:

Jerome Brunet 2019-12-18 18:24:17 +01:00 • committed by Greg Kroah-Hartman

parent b770ee3c2b

commit 7b623ba627

4 changed files with 50 additions and 28 deletions

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27

sound/soc/meson/axg-fifo.c

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6

sound/soc/meson/axg-fifo.h

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24

sound/soc/meson/axg-frddr.c

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21

sound/soc/meson/axg-toddr.c

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