powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed values

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To ensure that the DIU pixel clock will not be set to an invalid value,
clamp the PXCLK divider to the allowed range (2-255).  This also acts as
a limiter for the pixel clock.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Timur Tabi 2011-06-23 14:48:54 -05:00 • committed by Kumar Gala

parent ebf714ff37

commit 7b93eccf28

1 changed files with 6 additions and 1 deletions

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arch/powerpc/platforms/85xx/p1022_ds.c

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