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ARM: dts: uniphier: add outer cache controller nodes

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Add L2 cache controller nodes for all the UniPhier SoC DTSI.
Also, add an L3 cache controller node for PH1-Pro5 DTSI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Masahiro Yamada 2015-10-02 13:42:21 +09:00 • committed by Olof Johansson
commit 7c62f299ba
6 changed files with 97 additions and 0 deletions
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