tools/power/x86/intel-speed-select: Unify TRL levels

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TRL supports different levels including SSE/AVX2/AVX512.

Avoid using hardcoded level name and structure fields, so that a loop can
be used to parse each TRL level instead. This reduces several lines of
source code.

No functional changes are expected.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>

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Zhang Rui 2022-08-20 18:11:21 +08:00 • committed by Srinivas Pandruvada

parent 6f561677c2

commit 7c7e7c0d39

3 changed files with 44 additions and 60 deletions

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47

tools/power/x86/intel-speed-select/isst-core.c

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48

tools/power/x86/intel-speed-select/isst-display.c

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11

tools/power/x86/intel-speed-select/isst.h

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