drm/omap: fix TILER on OMAP5

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On OMAP5 it is not possible to use TILER buffer with CPU when caching or
write-combining is used. Doing so leads to errors from the memory
manager.

However, on OMAP4, write-combining works fine.

This patch adds platform specific data for the TILER, and a function
tiler_get_cpu_cache_flags() which can be used to get the caching mode to
be used.

Note that without write-combining the use of the TILER buffer with CPU
is unusably slow. It's still good to have it operational for testing
purposes.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

...

This commit is contained in:

Tomi Valkeinen 2014-09-25 19:24:29 +00:00

parent 2dab0bab6b

commit 7cb0d6c17b

4 changed files with 46 additions and 4 deletions

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6

drivers/gpu/drm/omapdrm/omap_dmm_priv.h

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39

drivers/gpu/drm/omapdrm/omap_dmm_tiler.c

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1

drivers/gpu/drm/omapdrm/omap_dmm_tiler.h

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4

drivers/gpu/drm/omapdrm/omap_gem.c

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