clk: meson: add od3 to the pll driver

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Some meson plls, such as the hdmi pll, are using a 3rd od parameter,
which is yet another "power of 2" post divider. Add it to fix the
calculation of the hdmi_pll rate

Fixes: 738f66d321 ("clk: gxbb: add AmLogic GXBB clk controller driver")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

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This commit is contained in:

Jerome Brunet 2018-01-19 16:55:25 +01:00

parent 4c5f67b7ea

commit 7d3142e5d6

3 changed files with 23 additions and 3 deletions

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19

drivers/clk/meson/clk-pll.c

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2

drivers/clk/meson/clkc.h

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5

drivers/clk/meson/gxbb.c

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