drm/i915: Tweak plane ddb allocation tracking

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Let's store the plane allocation in a manner which more closely
matches how the hw operates. That is, we store the packed/CbCr
ddb in one struct, and the Y ddb in another. Currently we're
storing packed/Y in one struct, CbCr in the other.

This also works pretty well for icl+ where the UV plane is
the main plane and the Y plane is subservient to it. Although
in this case we do not even use ddb_y as we do the ddb allocation
in terms of hw planes.

v2: Rebase

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220303191207.27931-2-ville.syrjala@linux.intel.com

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This commit is contained in:

Ville Syrjälä 2022-03-03 21:11:59 +02:00

parent f99f556907

commit 7d4561722c

6 changed files with 74 additions and 91 deletions

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32

drivers/gpu/drm/i915/display/intel_atomic_plane.c

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6

drivers/gpu/drm/i915/display/intel_bw.c

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8

drivers/gpu/drm/i915/display/intel_display.c

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4

drivers/gpu/drm/i915/display/intel_display_debugfs.c

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7

drivers/gpu/drm/i915/display/intel_display_types.h

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108

drivers/gpu/drm/i915/intel_pm.c

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