drm/xe: Fix ROW_CHICKEN2 define

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When this register was added in xe for some workarounds, it was copied
from i915 before the registers got changed to add the MCR annotation.
The register 0xe4f4 is MCR since gen8, long before any GPU supported by
the xe driver. Replace all occurrences with the right register.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230306165757.633796-1-lucas.demarchi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Lucas De Marchi 2023-03-06 08:57:57 -08:00 • committed by Rodrigo Vivi

parent cedbc0b757

commit 7dae750dde

2 changed files with 3 additions and 3 deletions

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2

drivers/gpu/drm/xe/regs/xe_gt_regs.h

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4

drivers/gpu/drm/xe/xe_wa.c

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