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drm/amd/display: eDP panel polarity control and test support
eDP panels can require explicit polarity control during power transitions to ensure correct signal behavior. Without this, panels that depend on polarity state may behave incorrectly when combined with refresh rate drop logic, since the two features previously had no coordination point. To address this, a set/reset/query API is introduced and integrated into the resource layer so polarity is managed as a first-class concern within the existing power optimization flow. RamlessPowerOptimization is updated to coordinate polarity state alongside refresh rate drop decisions, preventing the two paths from conflicting during transitions. Reviewed-by: Sreeja Golui <sreeja.golui@amd.com> Signed-off-by: Harry VanZyllDeJong <hvanzyll@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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