drm/amd/display: Add USB-C DP Alt Mode lane limitation in DCN32

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[ Upstream commit cea573a8e1 ]

[Why]
USB-C DisplayPort Alt Mode with concurrent USB data needs lane count
limitation to prevent incorrect 4-lane DP configuration when only 2 lanes
are available due to hardware lane sharing between DP and USB3.

[How]
Query DMUB for Alt Mode status (is_dp_alt_disable, is_usb, is_dp4) in
dcn32_link_encoder_get_max_link_cap() and cap DP to 2 lanes when USB is
active on USB-C port. Added inline documentation explaining the USB-C
lane sharing constraint.

Reviewed-by: PeiChen Huang <peichen.huang@amd.com>
Signed-off-by: LinCheng Ku <lincheng.ku@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

This commit is contained in:

LinCheng Ku 2025-12-03 10:18:16 +08:00 • committed by Sasha Levin

parent 08dca4c809

commit 7df6fe98b2

1 changed files with 12 additions and 3 deletions

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drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

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