drm/i915: Check the CPU cached value in HWS of seqno after waking the waiter

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If we have multiple waiters, we may find that many complete on the same
wake up. If we first inspect the seqno from the CPU cache, we may reduce
the number of heavyweight coherent seqno reads we require.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467390209-3576-13-git-send-email-chris@chris-wilson.co.uk

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Chris Wilson 2016-07-01 17:23:22 +01:00

parent f8973c217f

commit 7ec2c73b1d

1 changed files with 10 additions and 4 deletions

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drivers/gpu/drm/i915/i915_drv.h

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