drm/amd/display: dmcu wait loop calculation is incorrect in RV

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[Why]
Driver already get display clock from SMU base on MHz, but driver read
again and mutiple 1000 cause wait loop value is overflow.

[How]
remove coding error

Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Paul Hsieh 2020-04-07 17:18:47 +08:00 • committed by Alex Deucher

parent 904fb6e0f4

commit 7fc5c319ef

1 changed files with 0 additions and 3 deletions

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c

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