drm/i915: Make the CRTC state consistent during sanitize-disabling

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Make sure that the CRTC state is reset correctly, as expected after
disabling the CRTC.

In particular this change will:
- Zero all the CSC blob pointers after intel_crtc_free_hw_state()
  has freed them.
- Zero the shared DPLL and port PLL pointers and clear the
  corresponding CRTC reference flag in the PLL state.
- Reset all the transcoder and pipe fields.

v2:
- Reset fully the CRTC state. (Ville)
- Clear pipe active flags in the DPLL state.

v3:
- Clear only the CRTC reference flag and add a helper for this.
  (Ville)

v4:
- Rebased on previous patch, adding
  intel_unreference_shared_dpll_crtc() separately. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230510103131.1618266-4-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2023-05-10 13:31:20 +03:00

parent 0694cab1d5

commit 7ff9a17e37

3 changed files with 11 additions and 7 deletions

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2

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

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3

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

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13

drivers/gpu/drm/i915/display/intel_modeset_setup.c

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