arm64: dts: Add L2 cache topology for APM X-Gene SoC

In APM X-Gene SoC (both v1 and v2), each pair of processors
shares the same L2 cache. This patch adds l2-cache entries into
X-Gene SoC device tree to demonstrate this configuration.

Signed-off-by: Duc Dang <dhdang@apm.com>
This commit is contained in:
Duc Dang 2015-10-26 02:31:43 -07:00
commit 8000bc3fe9
2 changed files with 40 additions and 0 deletions