ARM: dts: aspeed: Update e3c246d4i vuart properties

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This device-tree was merged with a provisional vuart IRQ-polarity
property that was still under review and ended up taking a somewhat
different form.  This patch updates it to match the final form of the
new vuart properties, which additionally allow specifying the SIRQ
number and LPC address.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Fixes: ca03042f0f ("serial: 8250_aspeed_vuart: add aspeed, lpc-io-reg and aspeed, lpc-interrupts DT properties")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210416075113.18047-1-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>

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Zev Weiss 2021-04-16 02:51:13 -05:00 • committed by Joel Stanley

parent ca46ad2214

commit 812bae32e5

1 changed files with 3 additions and 1 deletions

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arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts

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