drm/i915: don't write powered down IRQ registers on Gen 8

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If we enable unclaimed register reporting on Gen 8, we will discover
that the IRQ registers for pipes B and C are also on the power well,
so writes to them when the power well is disabled result in unclaimed
register errors.

Also, hsw_power_well_post_enable() already takes care of re-enabling
them once the power well is enabled.

Testcase: igt/pm_rpm/rte
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Paulo Zanoni 2014-07-04 11:50:29 -03:00 • committed by Daniel Vetter

parent 480c803386

commit 813bde438c

1 changed files with 8 additions and 3 deletions

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drivers/gpu/drm/i915/i915_irq.c

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