riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader

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Add bootph-pre-ram hinting to jh7110.dtsi:
  - CPU interrupt controller(s)
  - gmac1_rgmii_rxin fixed-clock (dependency of syscrg)
  - gmac1_rmii_refin fixed-clock (dependency of syscrg)
  - oscillator
  - core local interrupt timer
  - syscrg clock-controller
  - pllclk clock-controller (dependency of syscrg)
  - DDR memory controller

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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E Shattow 2025-08-23 03:01:43 -07:00 • committed by Conor Dooley

parent 7114969021

commit 8181cc2f3f

1 changed files with 12 additions and 0 deletions

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arch/riscv/boot/dts/starfive/jh7110.dtsi

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