KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to support guest DS

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When CPUID.01H:EDX.DS[21] is set, the IA32_DS_AREA MSR exists and points
to the linear address of the first byte of the DS buffer management area,
which is used to manage the PEBS records.

When guest PEBS is enabled, the MSR_IA32_DS_AREA MSR will be added to the
perf_guest_switch_msr() and switched during the VMX transitions just like
CORE_PERF_GLOBAL_CTRL MSR. The WRMSR to IA32_DS_AREA MSR brings a #GP(0)
if the source register contains a non-canonical address.

Originally-by: Andi Kleen <ak@linux.intel.com>
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Message-Id: <20220411101946.20262-11-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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This commit is contained in:

Like Xu 2022-04-11 18:19:39 +08:00 • committed by Paolo Bonzini

parent 6ebe44366b

commit 8183a538cd

4 changed files with 22 additions and 2 deletions

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10

arch/x86/events/intel/core.c

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1

arch/x86/include/asm/kvm_host.h

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11

arch/x86/kvm/vmx/pmu_intel.c

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2

arch/x86/kvm/x86.c

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