KVM: PPC: PV mtmsrd L=1

Browse source

The PowerPC ISA has a special instruction for mtmsr that only changes the EE
and RI bits, namely the L=1 form.

Since that one is reasonably often occuring and simple to implement, let's
go with this first. Writing EE=0 is always just a store. Doing EE=1 also
requires us to check for pending interrupts and if necessary exit back to the
hypervisor.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>

...

This commit is contained in:

Alexander Graf 2010-07-29 14:48:04 +02:00 • committed by Avi Kivity

parent 92234722ed

commit 819a63dc79

2 changed files with 101 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

45

arch/powerpc/kernel/kvm.c

View file

56

arch/powerpc/kernel/kvm_emul.S

View file