ARM: clk-imx6q: fix video divider for rev T0 1.0

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The post dividers do not work on i.MX6Q rev T0 1.0 so they must be fixed
to 1. As the table index was wrong, a divider a of 4 could still be
requested which implied the clock not to be set properly. This is the
root cause of the HDMI not working at high resolution on rev T0 1.0 of
the SoC.

Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Gary Bisson 2014-12-03 15:03:51 -08:00 • committed by Shawn Guo

parent b2faf1a1af

commit 81ef447950

1 changed files with 1 additions and 1 deletions

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arch/arm/mach-imx/clk-imx6q.c

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