drm/ast: Fix incorrect register check for DRAM width

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commit 2d02b8bdba upstream.

During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width Status" register
to determine DRAM width.

Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.

Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>

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Timothy Pearson 2016-02-26 15:29:32 -06:00 • committed by Luis Henriques

parent a9ed3fef34

commit 82034c6dd3

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/ast/ast_main.c

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