drm/amd/display: Link training TPS1 workaround

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[Why]
Previously implemented early_cr_pattern was link level but the whole
asic should be affected.

[How]
 - change old link flag to dc level
 - new bit in dc->work_arounds set by DM

Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Martin Leung 2020-02-12 15:38:51 -05:00 • committed by Alex Deucher

parent dc326f61c5

commit 82054678ae

3 changed files with 10 additions and 10 deletions

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18

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

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1

drivers/gpu/drm/amd/display/dc/dc.h

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1

drivers/gpu/drm/amd/display/dc/dc_link.h

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