From 8249ceb6bb4c05825517d13eca28a5b572350946 Mon Sep 17 00:00:00 2001 From: Chaitanya Kumar Borah Date: Wed, 2 Sep 2026 13:24:13 +0530 Subject: [PATCH] drm/i915/color: Add support for 1D LUT in SDR planes Extend the SDR plane color pipeline to post-CSC 1D LUT block. v2: - In preparation of a simple pipeline [YUV Full/Limited -> RGB] -> [1D LUT] Drop pre-CSC LUT from the pipeline as it has no use in a YUV -> RGB pipeline. This makes the pipeline simple since the block lies between the YUV range correct block and Fixed function CSC. It can be added back when [RGB709 -> RGB2020] capability is added. Then it can be used for linearization. Signed-off-by: Chaitanya Kumar Borah Reviewed-by: Uma Shankar Link: https://patch.msgid.link/20260902075417.656673-6-chaitanya.kumar.borah@intel.com --- drivers/gpu/drm/i915/display/intel_color_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c index efd4375c4331..53e55ce0a5a3 100644 --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c @@ -45,6 +45,7 @@ static const enum intel_color_block hdr_plane_pipeline[] = { static const enum intel_color_block sdr_plane_yuv_pipeline[] = { INTEL_PLANE_CB_CSC_FF, + INTEL_PLANE_CB_POST_CSC_LUT, }; static const u64 intel_plane_supported_csc_ff =