powerpc/e6500: Make TLB lock recursive

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Once special level interrupts are supported, we may take nested TLB
misses -- so allow the same thread to acquire the lock recursively.

The lock will not be effective against the nested TLB miss handler
trying to write the same entry as the interrupted TLB miss handler, but
that's also a problem on non-threaded CPUs that lack TLB write
conditional.  This will be addressed in the patch that enables crit/mc
support by invalidating the TLB on return from level exceptions.

Signed-off-by: Scott Wood <scottwood@freescale.com>

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This commit is contained in:

Scott Wood 2014-03-07 14:48:35 -06:00

parent c4787d1ecf

commit 82d86de25b

3 changed files with 20 additions and 10 deletions

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9

arch/powerpc/include/asm/mmu-book3e.h

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2

arch/powerpc/kernel/setup_64.c

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19

arch/powerpc/mm/tlb_low_64e.S

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