drm/i915: DSL_LINEMASK is 12 bits only on gen2

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Gen3+ is 13 bits (12:0), and on gen2 only 12 (11:0). For both the high
bits are marked reserved, read-only so continue to mask them. Bit 31
is not reserved and has a meaning.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Paulo Zanoni 2012-05-04 17:18:14 -03:00 • committed by Daniel Vetter

parent 5e13a0c5ec

commit 837ba00f20

2 changed files with 10 additions and 4 deletions

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3

drivers/gpu/drm/i915/i915_reg.h

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11

drivers/gpu/drm/i915/intel_display.c

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