iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition

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This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Also, we check that the domain is a stage-1 domain.

Signed-off-by: Baptiste Reynal <b.reynal@virtualopensystems.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

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Baptiste Reynal 2015-03-04 16:51:06 +01:00 • committed by Joerg Roedel

parent bc465aa9d0

commit 83a60ed8f0

1 changed files with 6 additions and 3 deletions

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drivers/iommu/arm-smmu.c

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