drm/i915: Clear PPS port select when giving up the power sequencer

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VLV gets confused if two power sequencers have the same port selected.
It would seem the port doesn't start up properly in the is case and
vlv_wait_port_ready() will fail as will the link training. Clearing the
port select in the PP_ON_DELAYS register fixes this problem.

CHV doesn't seem to need this, but it doesn't seem to hurt either so
let's just do it for both to keep the code between the platforms as
uniform as possible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2014-10-16 21:29:51 +03:00 • committed by Daniel Vetter

parent 9a42356b96

commit 83b8459756

1 changed files with 28 additions and 4 deletions

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drivers/gpu/drm/i915/intel_dp.c

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