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drm/i915/icl: Fix DDI/TC port clk_off bits
DDI/TC clock-off bits are not equally distanced. TC1-3 bits are from offset 12 & TC4 is at offset 21. Create a function to choose correct clk-off bit. v2: Add fixes tag (Lucas) Fixes:c27e917e2b("drm/i915/icl: add basic support for the ICL clocks") Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181016023752.9285-1-lucas.demarchi@intel.com (cherry picked from commitbb1c7edc6d) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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