dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support

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The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC:
the CSRs layout is absolutely different and it doesn't support IRQs unlike
DW uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there
is no any reason to have these controllers described in the same bindings.
Let's split the DT-schema up.

Note since the synopsys,ddrc-ecc.yaml schema describes the Synopsys DW
uMCTL2 DDR controller only, we need to accordingly fix the device
descriptions.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220910194237.10142-15-Sergey.Semin@baikalelectronics.ru

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Serge Semin 2022-09-10 22:42:32 +03:00 • committed by Krzysztof Kozlowski

parent 9f8fb8032f

commit 8450813136

3 changed files with 59 additions and 43 deletions

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63

Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml

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Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml

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