spi: img-spfi: Limit bit clock to 1/4th of input clock

Browse source

Although the SPFI BITCLK divider supports a value of up to 255, only
values up to 128 are usable.  This results in a maximum possible bit
clock rate of 1/4th the input clock rate.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>

...

This commit is contained in:

Andrew Bresticker 2015-04-06 14:29:03 -07:00 • committed by Mark Brown

parent c517d838eb

commit 8543d0e72d

1 changed files with 5 additions and 5 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

10

drivers/spi/spi-img-spfi.c

View file