[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm

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The previous DPLL rate rounding algorithm counted the divider (N) down
from the maximum to 1.  Since we currently use a broad DPLL rate
tolerance, and lower N values are more power-efficient, we can often
bypass several iterations through the loop by counting N upwards from
1.

Peter de Schrijver <peter.de-schrijver@nokia.com> put up with several
test cycles of this patch - thanks Peter.

linux-omap source commit is 6f6d82bb2f80fa20a841ac3e95a6f44a5a156188.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

...

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Paul Walmsley 2009-01-28 12:08:41 -07:00 • committed by Russell King

parent b324504098

commit 85a5f78d2b

1 changed files with 18 additions and 17 deletions

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arch/arm/mach-omap2/clock.c

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