imx-drm: match ipu_di_signal_cfg's clk_pol with its description.

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According to the datasheet, setting the di0_polarity_disp_clk
field in the GENERAL di register sets the output clock polarity
to active high.

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Denis Carikli 2014-04-07 14:44:43 +02:00 • committed by Russell King

parent c9eaa447e7

commit 85de9d17c4

2 changed files with 2 additions and 2 deletions

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2

drivers/staging/imx-drm/ipu-v3/ipu-di.c

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2

drivers/staging/imx-drm/ipuv3-crtc.c

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