drm/amd/display: Add max_downscale_src_width debugfs for IGT validation

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[WHY]
The maximum source viewport width the ASIC can downscale from is held in
dc->debug.max_downscale_src_width and is not visible to userspace. Tests
(e.g. IGT amd_cursor_overlay scaling subtests) that downscale a plane
cannot tell whether a given source width is a genuine hardware
limitation or a driver defect, so they cannot correctly distinguish a
SKIP from a FAIL.

[HOW]
Add a read-only per-connector max_downscale_src_width debugfs file that
reports dc->debug.max_downscale_src_width, following the existing
internal_display debugfs entry. A value of 0 means no limit.

Assisted-by: Claude:opus-4.8
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Qi <Haoming.Qi@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Tony Qi 2026-08-12 15:55:12 -04:00 • committed by Alex Deucher

parent 8821a3b565

commit 86cc88af18

1 changed files with 20 additions and 0 deletions

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

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