drm/amd/display: update sequential pg logic DCN35

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[WHY & HOW]
No check for HUBP/DPP power gating when DSC instance is still running. Avoid HUBP/DPP to
power gate when corresponding DSC block is still running in the power gating calculation.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Yihan Zhu 2024-12-03 15:22:26 -05:00 • committed by Alex Deucher

parent 5b231f5bc9

commit 86f955b793

1 changed files with 6 additions and 1 deletions

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drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

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