drm: rcar-du: lvds: Adjust operating frequency for D3 and E3

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The D3 and E3 SoCs have different pixel clock frequency limits for the
LVDS encoder than the other SoCs in the Gen3 family. Adjust the mode
fixup implementation accordingly.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

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Laurent Pinchart 2019-03-03 22:29:21 +02:00

parent b764f2f66e

commit 8713703086

1 changed files with 7 additions and 2 deletions

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drivers/gpu/drm/rcar-du/rcar_lvds.c

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