x86/CPU/AMD: Fix AMD TLBI Erratum #1718

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The processor may fail to invalidate a TLB entry while executing an
INVLPGB/TLBSYNC instruction pair.

Detect the erratum and apply a software workaround when a microcode fix
is not present.

Fixes: 82378c6c2f ("x86/mm: Use INVLPGB for kernel TLB flushes")
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Rik van Riel <riel@surriel.com>
Acked-by: Lorenzo Stoakes (ARM) <ljs@kernel.org>
Tested-by: Lorenzo Stoakes (ARM) <ljs@kernel.org>
Tested-by: Rik van Riel <riel@surriel.com>
Cc: stable@kernel.org
Link: https://patch.msgid.link/20261002211617.1001617-1-bp@kernel.org

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This commit is contained in:

Borislav Petkov (AMD) 2026-10-02 14:16:17 -07:00

parent a90ee4305c

commit 87db7795cb

3 changed files with 13 additions and 0 deletions

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3

arch/x86/include/asm/cpufeatures.h

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6

arch/x86/include/asm/tlb.h

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4

arch/x86/kernel/cpu/amd.c

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