riscv: dts: starfive - Add hwrng node for JH7110 SoC

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Add hardware rng controller node for StarFive JH7110 SoC.

Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Jia Jie Ho 2023-08-08 22:15:58 +08:00 • committed by Conor Dooley

parent e2c07765e1

commit 87ddf5b109

1 changed files with 10 additions and 0 deletions

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arch/riscv/boot/dts/starfive/jh7110.dtsi

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