drm/msm/mdp5: Update headers (add CTL flush bits)

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Some upcoming targets have more bits to set in CTL_FLUSH
registers.

Example: msm8x16 needs to set TIMING1 bit so that some of the
INTF1's interface registers get flushed.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

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Stephane Viau 2015-03-24 09:30:01 -04:00 • committed by Rob Clark

parent 02dfd9d2ba

commit 87ed66c414

1 changed files with 10 additions and 2 deletions

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drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h

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