drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake

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At the moment the driver does not support AuxCCS at all due respective
modifiers being hidden from userspace.

As we are about to start enabling them, starting with Alderlake, let us
begin by limiting the ring buffer support to just that initial platform.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260324084018.20353-4-tvrtko.ursulin@igalia.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Tvrtko Ursulin 2026-03-24 08:40:09 +00:00 • committed by Rodrigo Vivi

parent 36052e56d5

commit 88139af77d

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1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/xe/xe_ring_ops.c

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