riscv: add SpacemiT SoC family Kconfig support

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The first SoC in the SpacemiT series is K1, which contains 8 RISC-V
cores with RISC-V Vector v1.0 support.

Link: https://www.spacemit.com/en/spacemit-key-stone-2/
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>

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Yangyu Chen 2024-07-30 00:28:10 +00:00 • committed by Yixun Lan

parent dfe6d083ed

commit 8814aa123a

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arch/riscv/Kconfig.socs

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