arm64: capabilities: Rework EL2 vector hardening entry

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Since 5e7951ce19 ("arm64: capabilities: Clean up midr range helpers"),
capabilities must be represented with a single entry. If multiple
CPU types can use the same capability, then they need to be enumerated
in a list.

The EL2 hardening stuff (which affects both A57 and A72) managed to
escape the conversion in the above patch thanks to the 4.17 merge
window. Let's fix it now.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

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Marc Zyngier 2018-04-10 11:36:43 +01:00 • committed by Will Deacon

parent 4bc352ffb3

commit 8892b71885

1 changed files with 11 additions and 9 deletions

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arch/arm64/kernel/cpu_errata.c

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