drm/i915/dsc: Track the detaild DSC slice configuration

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Add a way to track the detailed DSC pipes-per-line, streams-per-pipe,
slices-per-stream configuration instead of the current streams-per-pipe
and slices-per-line value. This way describes the slice configuration in
a clearer way, for instance providing a

2 pipes-per-line x 2 streams-per-pipe x 2 slices-per-stream = 8 slices-per-line

view, instead of the current, coarser

2 streams-per-pipe, 8 slices-per-line

view, the former better reflecting that each DSC stream engine has 2
slices. This also let's optimizing the configuration in a
simpler/clearer way, for instance using 1 stream x 2 slices, or 1 stream
x 4 slices instead of the current 2 stream x 1 slice, or 2 streams x 2
slices configuration (so that 1 DSC stream engine can be powered off in
each pipe).

Follow-up changes will convert the current slices-per-line computation
logic to compute instead the above detailed slice configuration.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260114162232.92731-2-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2026-01-14 18:22:18 +02:00

parent d30f75d2db

commit 889ff8dd46

3 changed files with 12 additions and 0 deletions

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5

drivers/gpu/drm/i915/display/intel_display_types.h

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5

drivers/gpu/drm/i915/display/intel_vdsc.c

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2

drivers/gpu/drm/i915/display/intel_vdsc.h

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