cxgb3: fix Gen2 pci default settings

Modify control register settings to accommodate the bridge's max read
requset size.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Divy Le Ray 2009-07-30 21:23:39 +00:00 • committed by David S. Miller
commit 88e7b76ef7