drm/msm/dpu: Add more of the INTF interrupt regions

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In addition to the other 7xxx INTF interrupt regions, SM8350 has
additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
these. The 7xxx naming scheme of the bits are kept for consistency.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/20211123154050.40984-1-bjorn.andersson@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>

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Bjorn Andersson 2021-11-23 07:40:49 -08:00 • committed by Rob Clark

parent fabae667b1

commit 89688e2119

2 changed files with 21 additions and 0 deletions

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18

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

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3

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

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