powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled

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In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead.  Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Timur Tabi 2012-07-23 15:43:32 -05:00 • committed by Kumar Gala

parent 6269f2584a

commit 896c01cb4b

1 changed files with 62 additions and 2 deletions

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arch/powerpc/platforms/85xx/p1022_ds.c

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