scsi: ufs: add missing memory barriers

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Performing several writes to UFS host controller registers has no
guarantee of ordering, so we must make sure register writes to setup
request list base address etc. are performed before the run/stop
register is enabled.  In addition, when setting up a task request, we
must make sure the updating of descriptors takes places before ringing
the doorbell, similarly to setting up a transfer request.

Reviewed-by: Dolev Raviv <draviv@codeaurora.org>
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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Yaniv Gardi 2016-02-01 15:02:48 +02:00 • committed by Martin K. Petersen

parent d75f7fe495

commit 897efe628d

1 changed files with 13 additions and 6 deletions

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19

drivers/scsi/ufs/ufshcd.c

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