ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit

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According to the AST2500/AST2520 specs, these SoCs support up to 228 GPIO
pins. However, 'gpio-ranges' value in 'aspeed-g5.dtsi' file is currently
setting the upper limit to 220 which isn't allowing access to all their
GPIOs. The correct upper limit value is 232 (actual number is 228 plus a
4-GPIO hole in GPIOAB). Without this patch, GPIOs AC5 and AC6 do not work
correctly on a AST2500 BMC running Linux Kernel v4.19

Fixes: 2039f90d13 ("ARM: dts: aspeed-g5: Add gpio controller to devicetree")
Signed-off-by: Oscar A Perez <linux@neuralgames.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

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Oscar A Perez 2019-05-01 13:26:43 +00:00 • committed by Joel Stanley

parent db3a766d2e

commit 89b97c429e

1 changed files with 1 additions and 1 deletions

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arch/arm/boot/dts/aspeed-g5.dtsi

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