dt-bindings: iommu: Add NVIDIA Tegra CMDQV support

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The Command Queue Virtualization (CMDQV) hardware is part of the
SMMUv3 implementation on NVIDIA Tegra SoCs. It assists in
virtualizing the command queue for the SMMU.

Add a new device tree binding document for nvidia,tegra264-cmdqv.

Also update the arm,smmu-v3 binding to include an optional nvidia,cmdqv
property. This property is a phandle to the CMDQV device node, allowing
the SMMU driver to associate with its corresponding CMDQV instance.
Restrict this property usage to Nvidia Tegra264 only.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Ashish Mhetre 2026-01-13 05:49:34 +00:00 • committed by Thierry Reding

parent d3b9e6d5b4

commit 8a59954192

2 changed files with 68 additions and 1 deletions

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27

Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml

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42

Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml

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